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Latencies in power systems: A database-based time-delay compensation for memory controllers
dc.contributor.author | Molina-Cabrera, Alexander | |
dc.contributor.author | Rios, Mario A. | |
dc.contributor.author | Besanger, Yvon | |
dc.contributor.author | Hadjsaid, Nouredine | |
dc.contributor.author | Montoya, Oscar Danilo | |
dc.date.accessioned | 2021-02-17T20:46:14Z | |
dc.date.available | 2021-02-17T20:46:14Z | |
dc.date.issued | 2021-01-18 | |
dc.date.submitted | 2021-02-17 | |
dc.identifier.citation | Molina-Cabrera, Alexander; Ríos, Mario A.; Besanger, Yvon; Hadjsaid, Nouredine; Montoya, Oscar D. 2021. "Latencies in Power Systems: A Database-Based Time-Delay Compensation for Memory Controllers" Electronics 10, no. 2: 208. https://doi.org/10.3390/electronics10020208 | spa |
dc.identifier.uri | https://hdl.handle.net/20.500.12585/10039 | |
dc.description.abstract | Time-delay is inherent to communications schemes in power systems, and in a closed loop strategy the presence of latencies increases inter-area oscillations and security problems in tie-lines. Recently, Wide Area Measurement Systems (WAMS) have been introduced to improve observability and overcome slow-rate communications from traditional Supervisory Control and Data Acquisition (SCADA). However, there is a need for tackling time-delays in control strategies based in WAMS. For this purpose, this paper proposes an Enhanced Time Delay Compensator (ETDC) approach which manages varying time delays introducing the perspective of network latency instead dead time; also, ETDC takes advantage of real signals and measurements transmission procedure in WAMS building a closed-loop memory control for power systems. The strength of the proposal was tested satisfactorily in a widely studied benchmark model in which inter-area oscillations were excited properly. | spa |
dc.format.extent | 16 páginas | |
dc.format.mimetype | application/pdf | spa |
dc.language.iso | eng | spa |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.source | Electronics 2021, 10(2), 208 | spa |
dc.title | Latencies in power systems: A database-based time-delay compensation for memory controllers | spa |
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datacite.rights | http://purl.org/coar/access_right/c_abf2 | spa |
oaire.version | http://purl.org/coar/version/c_970fb48d4fbd8a85 | spa |
dc.identifier.url | https://www.mdpi.com/2079-9292/10/2/208 | |
dc.type.driver | info:eu-repo/semantics/article | spa |
dc.type.hasversion | info:eu-repo/semantics/publishedVersion | spa |
dc.identifier.doi | 10.3390/electronics10020208 | |
dc.subject.keywords | Power systems analysis | spa |
dc.subject.keywords | Interconnected power systems | spa |
dc.subject.keywords | Latencies | spa |
dc.subject.keywords | Time-delay effects | spa |
dc.subject.keywords | Wide area monitoring systems | spa |
dc.rights.accessrights | info:eu-repo/semantics/openAccess | spa |
dc.rights.cc | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.identifier.instname | Universidad Tecnológica de Bolívar | spa |
dc.identifier.reponame | Repositorio Universidad Tecnológica de Bolívar | spa |
dc.publisher.place | Cartagena de Indias | spa |
dc.subject.armarc | LEMB | |
dc.type.spa | http://purl.org/coar/resource_type/c_2df8fbb1 | spa |
dc.audience | Investigadores | spa |
oaire.resourcetype | http://purl.org/coar/resource_type/c_2df8fbb1 | spa |
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